- 間歇電路
- 阻塞電路
- block: n. 1.片，塊，大塊；粗料，毛料；木料；石料；金屬塊； ...
- circuit: n. 1.(某一范圍的)周邊一圈；巡回，周游；巡回路線[ ...
- blocking circuit of mine fuze: 水雷引信封閉電路
- blocking of control circuit: 控制電路閉鎖
- blocking relay for closed circuit: 合閘閉鎖繼電器
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blocking circuit中文什么意思
- 間歇電路
- 阻塞電路
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例句與用法
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- Pulse skip mode is selected to design the whole chip organization and sub block circuit according to the comparison of the two control modes and the requirements of low power dissipation
通過兩種調(diào)制模式優(yōu)缺點的比較并根據(jù)芯片低功耗要求,選用跳周期調(diào)制模式進(jìn)行了電路的總體結(jié)構(gòu)設(shè)計。 - Based on the charge pump principle analysis and circuit design in the beginning chapters , the author simulated all the sub block circuits and whole chip circuit by applying eda tools hspice and viewlogic
在完成電路原理分析與電路設(shè)計的基礎(chǔ)之上,還應(yīng)用eda軟件hspice對各個子電路模塊和整體電路進(jìn)行了功能仿真及量化模擬。 - This thesis is a production of circuit principles and simulation practice . based on the circuit principle analysis , the author simulated the sub - block circuits and the whole
作者在電路原理分析的基礎(chǔ)之上,運用hspice仿真軟件對子電路模塊和整體電路進(jìn)行了功能和性能參數(shù)的仿真驗證,仿真結(jié)果均達(dá)到或優(yōu)于預(yù)定指標(biāo),證實了理論分析的正確性。 - Based on that , the author simulated most of the sub - block circuits and whole chip circuit by applying eda tools hspice . the simulation results indicate that the ic has achieved the expectation ,
理論分析、仿真結(jié)果和芯片測試數(shù)據(jù)表明,在典型情況下,該電路的電流控制精度相對誤差和匹配相對誤差可以控制在0 . 5 %以內(nèi),達(dá)到了預(yù)定設(shè)計目標(biāo)。 - The basic principle and main parameters of every sub - block circuit are noted and the simulation results are given at the end of each segment . based on the charge pump principle analysis and circuit design in the beginning chapters ,
在電荷泵原理分析和子電路設(shè)計基礎(chǔ)上,運用hspice仿真軟件對整體電路的關(guān)鍵指標(biāo)進(jìn)行了仿真并給出了詳細(xì)的仿真結(jié)果。